ME (DFT/Stnthesis/STA)

We are looking for a senior medium end design engineer or engineering manager who can lead a Synthesis/STA/DFT tasks in a SOC project. We also expect he/she be a contact window between FE design team and PD implementation team. Then Excellent communication is a must.

 

Key Responsibilities:

You will work with experienced design team to deliver advanced 3D image camara SOC chip. You need to work closely with our FE design team to deliver a DFT plan, debug SDC for Synthesis/STA, and also handle the synthesis tasks. You will be a contact window between FE design team and PD implementation team. 

 

Requirement:

● Master or PHD. 5+ years of Synthesis/STA/DFT related experience.

● Hands on DFT/Synthesis/STA tasks in a SOC project.

● Good undertanding to timing analysis and formal checking.

● Experience on UPF projects is a plus

● Experience on high speed design is a plus

● Experience on RTL designer is a plus

● Good communication, self-motivated, and able to work as a team player

 

2022年1月6日 11:52

ME (DFT/Stnthesis/STA) (上海/南京)